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TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 1 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? applications 24 - pin qfn 4x 4mm smt package ? ? ? ? ? product features functional block diagram ? ? ? ? ? ? ? ? ? ? ? general description pin configuration the tqp7m910 4 is a high linearity driver amplifier in industry standard, rohs compliant, qfn surface mount package. this ingap/gaas hbt delivers high performance across 700 - 2 7 00 m hz range of frequencies with 15.8 db gain, +4 9.5 dbm oip3 and + 32.5 dbm p1db at 2.14 ghz while only consuming 4 35 ma quiescent collector current. all devices are 100% rf and dc tested. the tqp7m910 4 incorporates on - chip features that differentiate i t from other products in the market. the amplifier integrates an on - chip dc over - voltage and rf over - drive protection. this protects the amplifier from electrical dc voltage surges and high input rf input power levels that may occur in a system. the tq p7m9104 is targeted for use as a driver amplifier in wireless infrastructure where high linearity, medium power, and high efficiency are required. th e device is an excellent candidate for transceiver line cards and high power amplifiers in current and next generation multi - carrier 3g / 4g base stations. standard t/r size =2500 pieces on a 1 3 reel. pin # symbol 1 vbias 4, 5 rfin 14, 15, 16 rfout/vcc 18 iref 2, 3, 6, 7, 8, 9, 10, 11, 12,13, 17, 19, 20, 21, 22, 23, 24 gnd / nc backside paddle rf/dc ground ordering information part no. de scription TQP7M9104 2w high linearity amplifier TQP7M9104 - pcb900 920 - 960mhz evb TQP7M9104 - pcb2140 2.11 - 2.17ghz evb 1 8 i r e f 1 7 g n d / n c r f o u t / v c c 1 6 1 5 r f o u t / v c c 1 4 r f o u t / v c c 1 3 g n d / n c 1 2 1 1 1 0 9 8 7 6 g n d / n c r f i n r f i n g n d / n c g n d / n c v b i a s 5 4 3 2 1 2 4 2 3 2 2 2 1 2 0 1 9 g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c b a c k s i d e p a d d l e - r f / d c g r o u n d
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 2 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? specifications absolute maximum ratings parameter rating storage temperature - 65 to + 150 c device voltage, v cc 6.5 v maximum input power , cw +30 dbm operation of this device outside the parameter ranges given above may cause permanent damage. recommended operating conditions parameter min typ max unit s v cc +5 + 5.25 v t case - 40 + 85 c tj (for >10 6 hours mttf ) 1 7 0 c electrical specifications are measured at specified test conditions. specifications are not guaranteed over all recommended operating conditions. electrical specifications test conditions:v cc = +5v, i cq = 4 35 ma, t = 25 ? c using a TQP7M9104 - pcb2140 application circuit. parameter conditions min typical max units operational bandwidth 700 27 00 mhz test frequency 2140 mhz power gain 14.3 1 5.8 17.3 db input return loss 1 2 db output return loss 9.5 db output ip3 pout= +17 dbm/tone, ?f=1mhz +45.5 + 49.5 dbm wcdma channel power (1) at - 50 dbc aclr + 23. 8 dbm output p1db +32 +3 2.8 dbm noise figure 4.4 db quiescent collector current, icq 355 4 35 490 ma vcc +5 v iref 19 ma ther mal resistance (jnc to case) jc 15.7 c/w notes: 1. aclr test set - up: 3gpp wcdma, tm1+64 dpch, +5 mhz offset, par = 9.7 db at 0.01% prob.
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 3 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? device characterization data s - parameter data v cc = +5 v, i cq = 435 ma, i ref = 19ma, t = +2 5 c, unmatched 50 ohm system, calibrated to device leads freq (mhz) s11 (db) s11 (ang) s21 (db) s21 (ang) s12 (db) s12 (ang) s22 (db) s22 (ang) 50 - 0.4553 - 179.26 20.126 118.98 - 43.273 4.1446 - 1.8524 - 155.37 100 - 0.4348 178.69 15.971 124.23 - 42.615 - 1.44 33 - 1.8878 - 166.21 200 - 0.4583 176.36 13.24 126.46 - 40.235 2.3772 - 1.859 - 172.01 400 - 0.5124 173.38 10.778 118.38 - 40.956 0.7196 - 1.5792 - 174.84 600 - 0.5796 171.48 8.9263 108.51 - 41.682 10.901 - 1.6005 - 175.51 800 - 0.6594 170.04 7.3201 100.05 - 42.533 - 8 .3414 - 1.6164 - 174.73 1000 - 0.7617 169.21 6.2878 93.94 - 42.841 6.4435 - 1.531 - 173.74 1200 - 0.8777 168.95 5.7693 89.116 - 40.461 3.1558 - 1.6296 - 171.43 1400 - 1.1121 168.56 5.5556 83.209 - 39.435 - 0.2787 - 1.7656 - 170.12 1600 - 1.4274 167.84 6.0222 74.67 - 41 .097 - 1.3568 - 1.8812 - 167.74 1800 - 1.9525 165.88 6.3509 63.971 - 37.935 - 22.971 - 1.951 - 165.22 2000 - 3.0149 163.02 7.1412 51.862 - 36.666 - 37.917 - 1.9853 - 163.19 2200 - 5.3234 162.27 8.1891 30.583 - 35.423 - 57.21 - 1.7616 - 163.18 2400 - 7.8162 - 179.65 8.2216 2.8455 - 35.631 - 78.615 - 1.5099 - 167.05 2600 - 5.6951 - 159.12 6.6099 - 26.943 - 35.017 - 113.27 - 1.2811 - 172.58 2800 - 3.2673 - 161.75 3.8288 - 51.412 - 37.551 - 151.24 - 1.2268 - 179.96 3000 - 2.1416 - 169.16 0.9043 - 67.725 - 39.417 - 168.38 - 1.4503 175.32 0 5 10 15 20 25 30 35 40 45 0 0.5 1 1.5 2 2.5 3 gain (db) frequency (ghz) gmax gain (s21) 0 1.0 1.0 -1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 input reflection coefficients swp max 3ghz swp min 0.05ghz s(1,1) 0 1.0 1.0 -1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 output reflection coefficients swp max 3ghz swp min 0.05ghz s(2,2)
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 4 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? reference design 869 - 894 mhz typical performance at 25 c r f performance plots 869 - 894 mhz freq uency (mhz) 869 880 894 units gain 20.8 20.8 20.8 db input return loss - 13.3 - 13 - 11.5 db output return loss - 7.7 - 8.6 - 9.8 db output p1db +34.3 +34.1 +33.8 dbm output ip3 (+23 dbm /tone, ?f = 1 mhz) +44.9 +44.9 +44.7 dbm wcdma channel power (at - 50 dbc aclr) 22 22.5 23 db supply voltage, vcc +5 v quiescent current, icq 435 ma reference current, iref 19 ma notes: 1. components shown on the silkscreen but not on the schematic are not used. 2. 0 resistors may be replaced with copper trace in the target application layout. 3. iref can be used as device power down current by placing r7 at location r8. 4. the recommended componen t values are dependent upon the frequency of operation. 5. all components are of 0603 size unless stated on the schematic. 6. r1 is critical for device linearity performance. 7. critical component placement locations: distance between center of c8 and u1 device pa ckage is 243 mil (11 at 880mhz) distance between center of l5 and u1 device package is 452 mil (20.5 at 880mhz) distance between center of c2 and u1 device package is 355 mil (16.1 at 880mhz) distance between center of c9 and u1 device package is 275 mil (12.4 at 880mhz) 1 2 3 4 5 6 g n d / n c 1 8 1 7 1 6 1 5 1 4 1 3 2 4 2 3 2 2 2 1 2 0 1 9 7 8 9 1 0 1 1 1 2 r f o u t r f o u t r f o u t g n d / n c i r e f g n d / n c v b i a s g n d / n c g n d / n c r f i n r f i n g n d / n c u 1 c 1 0 2 2 p f r 2 5 1 ? j 2 r f i n p u t c 9 2 . 7 p f c 8 8 . 2 p f j 3 r f o u t p u t c 2 8 . 2 p f c 3 4 . 7 p f c 7 1 0 u f 6 0 3 2 c 1 5 1 0 0 p f l 1 1 8 n h 0 8 0 5 b 1 0 ? c 1 1 0 0 p f c 1 7 1 0 0 0 p f l 3 0 ? r 1 3 3 n h 0 6 0 3 c 1 3 0 . 1 u f r 7 1 1 0 ? c 1 4 1 0 0 p f l 4 0 ? r 3 0 ? r 6 2 2 0 ? c 1 1 1 0 0 p f l 5 6 . 8 n h g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c v c c + 5 v d 3 s m 0 5 t 1 g c 1 1 c 1 0 r 2 c 9 c 1 c 7 c 1 5 c 3 c 8 c 2 r 6 r 3 r 1 l 4 l 1 u 1 b 1 c 1 7 r 7 c 1 3 c 1 4 l 3 l 5 18 19 20 21 22 0.85 0.86 0.87 0.88 0.89 0.90 gain (db) frequency (ghz) gain vs. frequency - 20 - 15 - 10 - 5 0 0.85 0.86 0.87 0.88 0.89 0.90 return loss (db) frequency (ghz) return loss vs. frequency s11 s22 30 35 40 45 50 55 21 22 23 24 25 26 27 oip3 (dbm) output power / tone(dbm) oip3 vs. output power vs. frequency 0.869 ghz 0.88 ghz 0.894 ghz 1mhz tone spacing temp.=+25 o c - 65 - 60 - 55 - 50 - 45 - 40 12 14 16 18 20 22 24 26 aclr (dbm) output power (dbm) aclr vs. output power vs. frequency 0.869ghz 0.88ghz 0.894ghz w - cdma 3gpp test model 1+64 dpch par = 9.7db @ 0.01% probability 3.84 mhz bw temp.=+25 o c 400 500 600 700 800 900 1000 1100 20 22 24 26 28 30 32 34 icc (ma) output power (dbm) collector current vs. output power temp.=+25 o c frequency : 0.88 ghz cw signal
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 5 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? application circui t 920 - 960 mhz ( tqp7m910 4 - pcb900) bill of material ref des value description manuf. part number n/a n/a printed circuit board triquint 1078282 n/a n/a printed circuit board triquint 1078282 d3 n/a zener, dual, sot - 23 various c9 2.7 pf capacitor, chip, 0603, 0.05pf, 50 v , accu - p avx 06035j2r7abstr b1, l3, l4, r3 0 resistor, chip, 0603, 5%, 1/16w various l5 6.8 nh inductor, 0603, 5% toko ll1608 - fsl6n8 c3 4.7 pf capacitor, chip, 0603, 0.05pf, 50 v, accu - p avx 06035j4r7abstr c2, c8 8.2 pf capacitor, chip, 0603, 0.05pf, 50 v, accu - p avx 06035j8r2abstr c10 22 pf capacitor, chip, 0603, 5%, 50 v, npo/cog various c1, c11 , c14, c15 100 pf capacitor, chip, 0603, 5%, 50v, npo/cog various l1 18 nh inductor, 1008 , 5%, coilcraft cs series coilcraft 1008hq - 18nxjl c17 1000 pf capacitor, chip, 0603, 10%, 50v, npo/cog various c13 0.1 uf capacitor, chip, 0603, 50v, x5r, 10% various c7 10 uf capacitor , tantalum, 6032, 35v, 10% various r2 51 resistor, chip, 0603, 5%, 1/16w various r6 220 resistor, chip, 0603, 1%, 1/16w various r7 110 resistor, chip, 0603, 1%, 1/16w various r1 33 nh inductor, 0603, 5% toko ll1608 - fsl33n r8, r4, c12, c4,d3 n/a do not place notes: 1. see pc board layout under application information section for more information. 2. components shown on the silkscreen but not on the schematic are not used. 3. 0 resistors may be replaced with copper trace in the target application layout. 4. iref can be used as device power down current by placing r7 at location r8. 5. the recommended component values a re dependent upon the frequency of operation. 6. all components are of 0603 size unless stated on the schematic. 7. r1 is critical for device linearity performance. 8. critical component placement locations: distance between center of c8 and u1 device package is 1 90 mil (9.2 at 940mhz) distance between center of l5 and u1 device package is 452 mil (21.8 at 940mhz) distance between center of c2 and u1 device package is 305 mil (14.7 at 940mhz) distance between center of c9 and u1 device package is 275 mil (13.3 at 940mhz) c 1 1 c 1 0 r 2 c 9 c 1 c 7 c 1 5 c 3 c 8 c 2 r 6 r 3 r 1 l 4 l 1 u 1 b 1 c 1 7 r 7 c 1 3 c 1 4 l 3 l 5 1 2 3 4 5 6 g n d / n c 1 8 1 7 1 6 1 5 1 4 1 3 2 4 2 3 2 2 2 1 2 0 1 9 7 8 9 1 0 1 1 1 2 r f o u t r f o u t r f o u t g n d / n c i r e f g n d / n c v b i a s g n d / n c g n d / n c r f i n r f i n g n d / n c u 1 c 1 0 2 2 p f r 2 5 1 ? j 2 r f i n p u t c 9 2 . 7 p f c 8 6 . 8 p f j 3 r f o u t p u t c 2 8 . 2 p f c 3 4 . 7 p f c 7 1 0 u f 6 0 3 2 c 1 5 1 0 0 p f l 1 1 8 n h 0 8 0 5 b 1 0 ? c 1 1 0 0 p f c 1 7 1 0 0 0 p f l 3 0 ? r 1 3 3 n h 0 6 0 3 c 1 3 0 . 1 u f r 7 1 1 0 ? c 1 4 1 0 0 p f l 4 0 ? r 3 0 ? r 6 2 2 0 ? c 1 1 1 0 0 p f l 5 6 . 8 n h g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c v c c + 5 v d 3 s m 0 5 t 1 g
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 6 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? typical performance 920 - 960 mhz typical performance at 25 c notes: 1. aclr test set - up: 3gpp wcdma, tm1+64 dpch, +5 mhz offset, pa r = 9.7 db at 0.01% prob. rf performance plots 920 - 960 mhz frequency (mhz) 920 940 960 units gain 20.8 21 21 db input return loss - 13 - 12 - 11 db output ret urn loss - 9 - 11.8 - 15 db output p1db +33.9 +33.8 +33.4 dbm output ip3 (+23 dbm/tone, ?f = 1 mhz) +45 +45 +45 dbm wcdma channel power (at - 50 dbc aclr) [1] +24 +23.5 +23 dbm supply voltage, vcc +5 v quiescent collector current, icq 435 ma reference current , iref 19 ma 18 19 20 21 22 23 0.90 0.92 0.94 0.96 0.98 1.00 gain (db) frequency (ghz) gain vs. frequency - 40 c +25 c +85 c - 20 - 15 - 10 - 5 0 0.90 0.92 0.94 0.96 0.98 1.00 return loss (db) frequency (ghz) input return loss vs. frequency - 40 c +25 c +85 c - 20 - 15 - 10 - 5 0 0.90 0.92 0.94 0.96 0.98 1.00 return loss (db) frequency (ghz) output return loss vs. frequency - 40 c +25 c +85 c 32 33 34 35 36 37 0.92 0.93 0.94 0.95 0.96 p1db (dbm) frequency (ghz) p1db vs. temperature +85 c +25 c ?40 c
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 7 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? 30 35 40 45 50 55 21 22 23 24 25 26 27 oip3 (dbm) output power / tone(dbm) oip3 vs. output power vs. temperature 1mhz tone spacing - 40 c +25 c +85 c 30 35 40 45 50 55 21 22 23 24 25 26 27 oip3 (dbm) output power / tone(dbm) oip3 vs. output power vs. frequency 0.92 ghz 0.94 ghz 0.96 ghz 1mhz tone spacing temp.=+25 o c - 65 - 60 - 55 - 50 - 45 - 40 12 14 16 18 20 22 24 26 aclr (dbm) output power (dbm) aclr vs. output power vs. temperature w - cdma 3gpp test model 1+64 dpch par = 9.7db @ 0.01% probability 3.84 mhz bw frequency : 0.94 ghz - 40 c +25 c +85 c - 65 - 60 - 55 - 50 - 45 - 40 12 14 16 18 20 22 24 26 aclr (dbm) output power (dbm) aclr vs. output power vs. frequency 0.92 ghz 0.94 ghz 0.96 ghz w - cdma 3gpp test model 1+64 dpch par = 9.7db @ 0.01% probability 3.84 mhz bw temp.=+25 o c 400 500 600 700 800 900 1000 1100 16 18 20 22 24 26 28 30 32 34 icc (ma) output power (dbm) collector current vs. output power temp.=+25 o c frequency : 0.94 ghz cw signal
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 8 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? application circuit 2110 - 2170 mhz ( TQP7M9104 - pcb2140) bill of material ref des value description manuf. part number u1 n/a 2w high linearity amplifier triquint TQP7M9104 n/a n/a printed circuit board triquint 1078282 d3 n/a zener, dual, sot - 23 various c8 1.5 pf capacitor, chip, 0603, 0.05pf, 50v, accu - p avx 06035j1r5abstr c9 2.4 pf capacitor, chip, 0603, 0.05pf, 50v, accu - p avx 06035j2r4abstr c2 2.7 pf capacitor, chip, 0603, 0.05pf, 50v, accu - p avx 06035j2r7abstr b1, l3, l4, r3, c11 0 resistor, chip, 0603, 5%, 1/16w various c10, c15 22 pf capacitor, chip, 0603, 5%, 50v, npo/cog various c1, c14, c3 100 pf capacitor, chip, 0603, 5%, 50v, npo/cog various l1 18 nh inductor, 1008, 5%, ceramic coilcraft 1008hq - 18nxjl c17 1000 pf ca pacitor, chip, 0603, 10%, 50v, npo/cog various c13 0.1 uf capacitor, chip, 0603, 10%, 50v, x5r various c7 10 uf capacitor , tantalum, 6032, 20 %, 50v various r2 51 resistor, chip, 0603, 5%, 1/16w various r6 220 resistor, chip, 0603, 1%, 1/16w v arious r7 110 resistor, chip, 0603, 1%, 1/16w various r1 120 nh inductor, 0603, 5% toko ll1608 - fsr12j r8, r4, c12, c4, d3 n/a do not place notes: 1. see pc board layout under application information section for more information. 2. components shown on the silkscreen but not on the schematic are not used. 3. 0 resistors may be replaced with copper trace in the target application layout. 4. iref can be used as device power down current by placing r7 at location r8. 5. the recommended component values are dependent upon the frequency of operation. 6. all components are of 0603 size unless stated on the schematic. 7. r1 is critical for device linearity performance. 8. critical component placement locations: distance between center of c8 and u1 device package is 50 mil ( 5.5 at 2140mhz) distance between center of c2 and u1 device package is 113 mil (12.4 at 2140mhz) distance between center of c9 and u1 device package is 275 mil (30.3 at 2140mhz) c 1 1 c 1 0 r 2 c 9 c 1 c 7 c 1 5 c 3 c 8 c 2 r 6 r 3 r 1 l 4 l 1 u 1 b 1 c 1 7 r 7 c 1 3 c 1 4 l 3 1 2 3 4 5 6 g n d / n c 1 8 1 7 1 6 1 5 1 4 1 3 2 4 2 3 2 2 2 1 2 0 1 9 7 8 9 1 0 1 1 1 2 r f o u t r f o u t r f o u t g n d / n c i r e f g n d / n c v b i a s g n d / n c g n d / n c r f i n r f i n g n d / n c u 1 c 1 0 2 2 p f r 2 5 1 ? j 2 r f i n p u t c 9 2 . 4 p f c 8 1 . 5 p f c 1 1 0 ? j 3 r f o u t p u t c 2 2 . 7 p f c 3 1 0 0 p f c 7 1 0 u f 6 0 3 2 c 1 5 2 2 p f l 1 1 8 n h 0 8 0 5 b 1 0 ? c 1 1 0 0 p f c 1 7 1 0 0 0 p f l 3 0 ? r 1 1 2 0 n h 0 6 0 3 c 1 3 0 . 1 u f r 7 1 1 0 ? c 1 4 1 0 0 p f l 4 0 ? r 3 0 ? r 6 2 2 0 ? g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c v c c + 5 v d 3 s m 0 5 t 1 g
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 9 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? typical performance 2110 - 2170 mhz notes: 1. aclr test set - up: 3gpp w cdma, tm1+64 dpch, +5 mhz offset, par = 9.7 db at 0.01% prob. rf performance plots 2110 - 2170 mhz frequency mhz 2110 21 40 2170 gain db 15.8 1 5.8 1 5.8 input return loss db - 1 2.4 - 12.0 - 11. 8 output return loss db - 8.7 - 9.5 - 1 0.5 output p1db dbm + 32.9 +3 2.8 +32.8 output ip3 (+ 17 dbm/tone, ?f = 1 mhz ) dbm +4 9 +49.5 + 50 wcdma channel power (at - 50 dbc aclr) [1] db m +2 3.5 +2 3. 8 +2 4.0 noise figure db 4.4 4.4 4.6 supply voltage, vcc v + 5 quiescent collector current, icq ma 4 35 reference current , iref ma 19 13 14 15 16 17 18 2.10 2.12 2.14 2.16 2.18 2.20 gain (db) frequency (ghz) gain vs. frequency - 40 c +25 c +85 c - 20 - 15 - 10 - 5 0 2.10 2.12 2.14 2.16 2.18 2.20 return loss (db) frequency (ghz) input return loss vs. frequency - 40 c +25 c +85 c - 20 - 15 - 10 - 5 0 2.10 2.12 2.14 2.16 2.18 2.20 return loss (db) frequency (ghz) output return loss vs. frequency - 40 c +25 c +85 c 30 31 32 33 34 35 2.11 2.12 2.13 2.14 2.15 2.16 2.17 p1db (dbm) frequency (ghz) p1db vs. temperature +85 c +25 c ?40 c
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 10 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? 400 500 600 700 800 900 1000 16 18 20 22 24 26 28 30 32 34 collector current (ma) output power (dbm) icc vs. output power temp.=+25 o c frequency : 2.14 ghz cw signal 2.0 3.0 4.0 5.0 6.0 2.11 2.12 2.13 2.14 2.15 2.16 2.17 nf (db) frequency (ghz) noise figure vs. frequency 30 35 40 45 50 55 13 15 17 19 21 23 25 oip3 (dbm) output power / tone(dbm) oip3 vs. output power vs. temperature 1mhz tone spacing - 40 c +25 c +85 c 30 35 40 45 50 55 13 15 17 19 21 23 25 oip3 (dbm) output power / tone(dbm) oip3 vs. output power vs. frequency 2.11 ghz 2.14 ghz 2.17 ghz 1mhz tone spacing temp.=+25 o c - 65 - 60 - 55 - 50 - 45 - 40 17 19 21 23 25 27 aclr (dbm) output power (dbm) aclr vs. output power vs. temperature w - cdma 3gpp test model 1+64 dpch par = 9.7db @ 0.01% probability 3.84 mhz bw frequency : 2.14 ghz - 40 c +25 c +85 c - 65 - 60 - 55 - 50 - 45 - 40 17 19 21 23 25 27 aclr (dbm) output power (dbm) aclr vs. output power vs. frequency 2.11 ghz 2.14 ghz 2.17 ghz w - cdma 3gpp test model 1+64 dpch par = 9.7db @ 0.01% probability 3.84 mhz bw temp.=+25 o c
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 11 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? pin configuration and description pin symbol description 1 vbias voltage supply for active bias for the amp. connect to same supply voltage as vcc. 2, 3, 6, 7, 8, 9, 10, 11, 12, 13,17 , 19, 20, 21, 22, 23, 24 gnd/nc no internal connection. this pin can be grounded or n/c on pcb. land pads should be provided for pcb mounting integrity. 4, 5 rfin rf input. dc voltage present, bloc king capacitor required. requires external match for optimal performance. 14, 15, 16 rfout / vcc rf output. dc voltage present, blocking cap required. requires external match for optimal performance. 18 iref reference current into internal active b ias current mirror. current into iref sets device quiescent current. also, can be used as on/off control. backside paddle rf/dc gnd multiple vias should be employed to minimize inductance and thermal resistance. use recommended via pattern shown under mou nting configuration and ensure good solder attach for optimum thermal and electrical performance evaluation board pcb information triquint pcb 1080068 material and stack - up 50 ohm line dimensions: width = .031 spacing = .035. 1 o z . c u b o t t o m l a y e r n e l c o n - 4 0 0 0 - 1 3 c o r e n e l c o n - 4 0 0 0 - 1 3 r = 3 . 7 t y p . 1 o z . c u t o p l a y e r 1 o z . c u i n n e r l a y e r 1 o z . c u i n n e r l a y e r 0 . 0 1 4 " 0 . 0 1 4 " 0 . 0 6 2 " 0 . 0 0 6 " f i n i s h e d b o a r d t h i c k n e s s 1 8 i r e f 1 7 g n d / n c r f o u t / v c c 1 6 1 5 r f o u t / v c c 1 4 r f o u t / v c c 1 3 g n d / n c 1 2 1 1 1 0 9 8 7 6 g n d / n c r f i n r f i n g n d / n c g n d / n c v b i a s 5 4 3 2 1 2 4 2 3 2 2 2 1 2 0 1 9 g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c g n d / n c b a c k s i d e p a d d l e - r f / d c g r o u n d
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 12 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? mec hanical information package marking and dimensions pcb mounting pattern notes: 1. the pad pattern shown has been developed and tested for optimized assembly at triquint semiconductor. the pcb land pattern has been developed to accommodate lead and package tolerances. since surface mount processes vary from supplier to supplier, careful process develo pment is recommended. 2. all dimensions are in millimeters [inches]. angles are in degrees. 3. use 1 oz. copper minimum for top and bottom layer metal. 4. vias are required under the backside paddle of this device for proper rf/dc grounding and thermal dissipat ion. we recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.10). 5. ensure good package backside paddle solder attach for reliable operation and best electrical performance. 6. place mounting scre ws near the part to fasten a back side heat sink. 7. do not apply solder mask to the back side of the pc board in the heat sink contact region. 8. ensure that the backside via region makes good physical contact with the heat sink. 7m9104 package marking: part number C 7m9104 year, week - yyww assembly code - xxxxx 4.000 4.000 .85 .05 0.000-.050 0.203 ref. d .08 c f .10 c c a b pin #1 identification chamfer 0.300 x 45 2.7000.050 exp.dap 2.7000.050 exp.dap .500 bsc 2.500 ref. .4000.050 .250.050 r.075 .64 typ 2.70 2.70 2.70 2.70 component side back side .64 typ 16x .38 .50 pitch, typ full r.19 24x .70
TQP7M9104 2w high linearity amplifier data sheet: rev h 0 9 / 2 4 /12 - 13 of 13 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? product compliance information esd sensitivity ratings esd rating: 1c value: 1000 v and < 2 solderability compatible with both lead - free (260 c ma x. reflow temp.) and tin/lead (245 c max. reflow temp.) soldering processes. package lead plating: annealed matte tin over copper rohs compliance this part is compliant with eu 2002/95/ec rohs directive (restrictions on the use of certain hazardous subs tances in electrical and electronic equipment). this product also has the following attributes: ? ? ? ? 15 h 12 br 4 0 2 ) free ? ? msl classification msl rating: 1 test: +260 c convec tion reflow standard: jedec standard ipc/jedec j - std - 020 contact information for the latest specifications, additional product information, worldwide sales and distribution locations, and information about triquint: web: www.triquint.com tel: +1.503.615.9000 email: info - sales@tqs.com fax: +1.503.615.8902 for technical questions and application information: email: sjcapplications.engineering@tqs.com important notice the information contained herein is believed to be reliable. triquint makes no warranties regarding the information contain ed herein. triquint assumes no responsibility or liability whatsoeve r for any of the information contained herein. triquint assumes no responsibility or liability whatsoever for the use of the information contained herein. the information contained herein is provided "as is, where is" and with all faults, and the entire risk associated with such information is entirely with the user. all information contained herein is subject to change without notice. customers should obtain and verify the latest relevant information before placing orders for triquint products. the in formation contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. triquint products are not warranted or authorized for use as critical components in medical, life - saving, or life - sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal inju ry or death.

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